计算机组成与设计：硬件/软件接口 MIPS版（原书第6版）

• 偏扁豆

  2024-10-27
  DRAM：动态随机访问存储器，集成电路形式的存储器，可随机访问任何地址的存储内客。访问时间大约为50ns，在2012年时每gigabyte售价5~10美元。cache：一种小而快的存储器，一般作为大而慢的存储器的缓存。cache使用SRAM。SRAM：静态随机访问存储器，集成电路形式的存储器比DRAM速度更快，集成度更低。随机访问代表访问数据的效率是O(1)
• 7086

  2022-01-11
  For example, as Figure 4.34 shows, the instruction memory is used during only one of the five stages of an instruction, allowing it to be shared by following instructions during the other four stages. To retain the value of an individual instruction for its other four stages, the value read from instruction memory must be saved in a register. Similar arguments apply to every pipeline stage, so we must place registers wherever there are dividing lines between stages in Figure 4.33. Returning to our laundry analogy, we might have a basket between each pair of stages to hold the clothes for the next step.
• 7086

  2022-01-10
  One popular approach to dynamic prediction of branches is keeping a history for each branch as taken or untaken, and then using the recent past behavior to predict the future. As we will see later, the amount and type of history kept have become extensive, with the result being that dynamic branch predictors can correctly predict branches with more than 90% accuracy(see Section 4.8). When the guess is wrong, the pipeline control must ensure that the instructions following the wrongly guessed branch have no effect and must restart the pipeline from the proper branch address.
• 7086

  2022-01-10
  The equivalent decision task in a computer is the branch instruction. Notice that we must begin fetching the instruction following the branch on the very next clock cycle. Nevertheless, the pipeline cannot possibly know what the next instruction should be, since it only just recerved the branch instruction from memory! Just as with laundry, one possible solution is to stall immediately after we fetch a brand, waiting until the pipeline determines the outcome of the branch and knows what instruction address to fetch from.
• 7086

  2022-01-10
  As we said above, the MIPS instruction set was designed to be pipelined, making it fairly easy for designers to avoid structural hazards when designing a pipeline. Suppose, however, that we had a single memory instead of two memories. If the pipeline in Figure 4.27 had a fourth instruction, we would see that in the same dock cycle the first instruction is accessing data from memory while the fourth instruction is fetching an instruction from that same memory. Without two memories, our pipeline could have a structural hazard.
• 7086

  2022-01-06
  By partitioning the carry chains within a 64-bit adder, a processor could perform simultaneous operations on short vectors of eight 8-bit operands, four I6-bit operands, or two 32-bit operands. The cost of such partitioned adder was small. These extensions have been called vector or SIMD, for single instructio multiple data(see Section 2.17 and Chapter 7).
• 7086

  2022-01-06
  Overflow occurs in subtraction when we subtract a negative number from a positive number and get a negative result, or when we subtract a positive number from a negative number and get a positive result. This means a borrow occurred from the sign bit.
• 7086

  2022-01-06
  When adding operands with different signs , overflow cannot occur.
• 7086

  2021-10-01
  Elaboration: One optimization that works with this example is procedure inlining. Instead of passing arguments in parameters and invoking the code with a BL instruction, the compiler would copy the code from the body of the swap procedure where the call to Swap appears in the code. Inlining would avoid four instructions in this example. The downside of the inlining optimization is that the compiled code would be bigger if the inlined procedure is called from several locations. Such a code expansion might tum into lower performance if it increased the cache miss rate; see Chapter 5.
• [已注销]

  2017-02-13
  The most important functions of operating systems are:1. Handling basic input and output operations2. Allocating storage and memory3. Providing for protected sharing of the computer among multiple applications using it simultaneously
• 银河

  2014-02-27
  为了避免名称上的冗长，称之为多核微处理器而不是多处理器微处理器（multicore microprocessor）。
• 银河

  2014-02-19
  下面是这段 C 代码对应的 MIPS 指令，假设所有的变量都在存储器中，且以 $st0 为基址进行寻址
• 银河

  2013-11-25
  如果运输业的发展速度也像计算器工业那样快，那么今天我们从纽约到伦敦的旅行时间只需1秒钟，花费只有几美分。
• 大夜

  2013-07-01
  The most beautiful thing we can experience is the mysterious. It is the source of all true art and science.Albert Einstein, What I Believe, 1930
• 大夜

  2013-07-01
  To Linda, who has been, is, and always will be the love of my life
• knightfaith

  2012-05-06
  How are programs written in a high-level language translated into the language of the hardware, and how does the hardware execute the resulting program?
• knightfaith

  2012-05-06
  Servers also place a greater emphasis on dependability, since a crash is usually more costly than it would be on a single-user desktop computer....Despite their low cost, embedded computers often have lower tolerance for failure, since the results can vary from upsetting to devastating.
• knightfaith

  2012-05-05
  While programmers could ignore the advice and rely on computer architects, compiler writers, and silicon engineers to make their programs run faster without change, that era is over. ...While the goal of many researchers is to make it possible for programmers to be unaware of the underlying parallel nature of the hardware they are programming, it will take many years to realize this vision.
• 大夜

  2013-07-01
  Civilization advances by extending the number of important operations which we can perform without thinking about them.Alfred North Whitehead, An Introduction to Mathematics, 1911