Computer Architecture

- 书名:Computer Architecture
- 作者: JohnL.Hennessy DavidA.Patterson
- 格式:PDF
- 时间:2024-07-04
- 评分:
- ISBN:9780123838728
The computing world today is in the middle of a revolution: mobile clients and cloud computing have emerged as the dominant paradigms driving programming and hardware innovation today. The Fifth Edition of Computer Architecture focuses on this dramatic shift, exploring the ways in which software and technology in the cloud are accessed by cell phones, tablets, laptops, and other mobile computing devices. Each chapter includes two real-world examples, one mobile and one datacenter, to illustrate this revolutionary change. Updated to cover the mobile computing revolution Emphasizes the two most important topics in architecture today: memory hierarchy and parallelism in all its forms. Develops common themes throughout each chapter: power, performance, cost, dependability, protection, programming models, and emerging trends ("What's Next") Includes three review appendices in the printed text. Additional reference appendices are available online. Includes updated Case Studies and completely new exercises.
John L. Hennessy is the president of Stanford University, where he has been a member of the faculty since 1977 in the departments of electrical engineering and computer science. Hennessy is a fellow of the IEEE and the ACM, a member of the National Academy of Engineering, the National Academy of Science, the American Academy of Arts and Sciences, and the Spanish Royal Academy o...
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腹黑眼镜2015-12-20GPU那章太恶心了,terminology hell。。。。。。
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沙鸥2014-01-10看了几个介绍都说不适合新手,我这个新手只好硬着头皮逆流而上了。
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核电厂老板2015-03-09杰作,美国计算机研究生教材
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E.T2013-06-20A difficult decision is whether to make the cache hit time fast, to keep pace with the high clock rate of processors, or to make the cache large to reduce the gap between the processor accesses and main memory accesses. Adding another level of cache between the original cache and memory simplifies the decision (see Figure 2.3). The first-level cache can be small enough to match a fast clock cycle time, yet the second-level (or third-level) cache can be large enough to capture many accesses that would go to main memory. The focus on misses in second-level caches leads to larger blocks, bigger capacity, and higher associativity. Multilevel caches are more power efficient than a single aggregate cache.
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容貌焦虑主理人2013-04-16四插槽MD四插槽AMD
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容貌焦虑主理人2013-04-16(2) 存储器寻址。80x86(见附录图A-2)不需要对齐,但如果操作数是对齐的,访问速度通常会更快一些。(See Figure A.5 on page A-8.) The 80x86 does not requirealignment, but accesses are generally faster if operands are aligned.(见附录A图A.5)
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